? 2003 ixys all rights reserved symbol test conditions maximum ratings v dss t j = 25 c to 150 c 300 v v dgr t j = 25 c to 150 c; r gs = 1 m ? 300 v v gs continuous 20 v v gsm transient 30 v i d25 t c = 25 c50a i dm t c = 25 c, pulse width limited by t jm 200 a i ar t c = 25 c50a e ar t c = 25 c50mj e as t c = 25 c 1.5 j dv/dt i s i dm , di/dt 100 a/ s, v dd v dss , 5 v/ns t j 150 c, r g = 2 ? p d t c = 25 c 400 w t j -55 ... +150 c t jm 150 c t stg -55 ... +150 c t l 1.6 mm (0.062 in.) from case for 10 s 300 c m d mounting torque (to-247) 1 .13/10 nm/lb.in. weight to-247 6 g to-268 5 g to-247 (ixth) g = gate d = drain s = source tab = drain (tab) ds99011a(08/03) symbol test conditions characteristic values (t j = 25 c, unless otherwise specified) min. typ. max. v dss v gs = 0 v, i d = 250 a 300 v v gs(th) v ds = v gs , i d = 250 a 2.0 4.0 v i gss v gs = 20 v dc , v ds = 0 100 na i dss v ds = v dss t j = 25 c25 a v gs = 0 v t j = 125 c 250 a r ds(on) v gs = 10 v, i d = 0.5 i d25 65 m ? pulse test, t 300 s, duty cycle d 2 % high current power mosfet ixth 50n30 v dss = 300 v ixtt 50n30 i d25 = 50 a r ds(on) = 65 m ? ? ? ? ? advance technical information n-channel enhancement mode features z international standard packages z low r ds (on) hdmos tm process z rugged polysilicon gate cell structure z unclamped inductive switching (uis) rated z low package inductance - easy to drive and to protect advantages z easy to mount z space savings z high power density to-268 (ixtt) g s d (tab)
ixys reserves the right to change limits, test conditions, and dimensions. ixys mosfets and igbts are covered by one or more of the following u.s. patents: 4,835,592 4,881,106 5,017,508 5,049,961 5,187,117 5,486,715 6,306,728b1 6,259,123b1 6,306,728b 1 4,850,072 4,931,844 5,034,796 5,063,307 5,237,481 5,381,025 6,404,065b1 6,162,665 6,534,343 ixth 50n30 ixtt 50n30 symbol test conditions characteristic values (t j = 25 c, unless otherwise specified) min. typ. max. g fs v ds = 10 v; i d = 0.5 i d25 , pulse test 24 36 s c iss 4400 pf c oss v gs = 0 v, v ds = 25 v, f = 1 mhz 700 pf c rss 240 pf t d(on) 24 ns t r v gs = 10 v, v ds = 0.5 v dss , i d = 0.5 i d25 33 ns t d(off) r g = 2 ? (external) 70 ns t f 17 ns q g(on) 165 nc q gs v gs = 10 v, v ds = 0.5 v dss , i d = 0.5 i d25 30 nc q gd 80 nc r thjc 0.31 k/w r thck (to-247) 0.21 k/w source-drain diode characteristic values (t j = 25 c, unless otherwise specified) symbol test conditions min. typ. max. i s v gs = 0 v 50 a i sm repetitive 200 a v sd i f = i s , v gs = 0 v, 1.5 v pulse test, t 300 s, duty cycle d 2 % t rr i f = 25a -di/dt = 100 a/ s v r = 100v q rm 360 4.0 ns c dim. millimeter inches min. max. min. max. a 4.7 5.3 .185 .209 a 1 2.2 2.54 .087 .102 a 2 2.2 2.6 .059 .098 b 1.0 1.4 .040 .055 b 1 1.65 2.13 .065 .084 b 2 2.87 3.12 .113 .123 c .4 .8 .016 .031 d 20.80 21.46 .819 .845 e 15.75 16.26 .610 .640 e 5.20 5.72 0.205 0.225 l 19.81 20.32 .780 .800 l1 4.50 .177 ? p 3.55 3.65 .140 .144 q 5.89 6.40 0.232 0.252 r 4.32 5.49 .170 .216 s 6.15 bsc 242 bsc to-247 outline terminals: 1 - gate 2 - drain 3 - source tab - drain 1 2 3 to-268 outline
? 2003 ixys all rights reserved fig. 2. extended output characteristics @ 25 deg. c 0 20 40 60 80 10 0 12 0 14 0 03 691215 v ds - volts i d - amperes v gs = 1 0v 9v 8v 5v 6v 7v fig. 3. output characteristics @ 125 deg. c 0 10 20 30 40 50 0 12345678 v ds - volts i d - amperes v gs = 1 0v 9v 8v 7v 5v 6v fig. 1. output characteristics @ 25 deg. c 0 10 20 30 40 50 0 0.5 1 1.5 2 2.5 3 3.5 v ds - volts i d - amperes v gs = 1 0v 9v 8v 7v 5v 6v fig. 4. r ds(on) normalized to i d25 value vs. junction temperature 0.5 1 1. 5 2 2.5 3 -50 -25 0 25 50 75 100 125 150 t j - degrees centigrade r ds(on) - normalize d i d = 50a i d = 25a v gs = 1 0v fig. 6. drain current vs. case t emperature 0 10 20 30 40 50 60 -50 -25 0 25 50 75 100 125 150 t c - degr ees centigr ade i d - amperes fig. 5. r ds(on) normalized to i d25 value vs. i d 0.6 1 1. 4 1. 8 2.2 2.6 3 3.4 0 20406080100120140 i d - amperes r ds(on) - normalize d t j = 1 25oc t j = 25oc v gs = 1 0v ixth 50n30 ixtt 50n30
ixys reserves the right to change limits, test conditions, and dimensions. ixys mosfets and igbts are covered by one or more of the following u.s. patents: 4,835,592 4,881,106 5,017,508 5,049,961 5,187,117 5,486,715 6,306,728b1 6,259,123b1 6,306,728b 1 4,850,072 4,931,844 5,034,796 5,063,307 5,237,481 5,381,025 6,404,065b1 6,162,665 6,534,343 fig. 11. capacitance 10 0 10 0 0 10000 0 5 10 15 20 25 30 35 40 v ds - volts capacitance - p f c iss c oss c rss f = 1 m hz fig. 10. gate charge 0 2 4 6 8 10 0 25 50 75 100 125 150 175 q g - nanocoulombs v gs - volts v ds = 1 50v i d = 25a i g = 1 0ma fig. 7. input admittance 0 20 40 60 80 10 0 3.5 4 4.5 5 5.5 6 6.5 7 v gs - volts i d - amperes t j = -40oc 25oc 1 25oc fig. 12. maximum t ransient t hermal resistance 0.01 0.1 1 1 10 100 1000 pulse width - milliseconds r (th)jc - (oc/w) fig. 8. transconductance 0 15 30 45 60 75 0 20 40 6080100120140 i d - amperes g fs - siemens t j = -40oc 25oc 1 25oc fig. 9. source current vs. source-to-drain voltage 0 25 50 75 10 0 12 5 15 0 0.4 0.55 0.7 0.85 1 1.15 1.3 v sd - volts i s - amperes t j = 1 25oc t j = 25oc ixth 50n30 ixtt 50n30
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